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Webinar "Versal ACAP: The processing system interfaces" -register now-

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 1. Home
 2. Training
 3. Versal ACAP: The processing system interfaces - WEBINAR


VERSAL ACAP: THE PROCESSING SYSTEM INTERFACES - WEBINAR

With the Versal ACAP familiy many elements are an evolution from the Zynq
Ultrascale+ MPSoC devices. This session will cover the SoC features to provide
insight into the full width of peripherals and connectivity in the processing
system (or now CIPS) of these devices offer. Furthermore, the interconnects to
other regions of the devices are described to give insight into the capabilities
of the ACAP technology and hint on variability of systems built on these.

 

Registrierung:

Melden Sie sich kostenlos für dieses Webinar an. 

Live:

Sie haben während des Webinars Zeit direkt Fragen an den Trainer zu stellen.

Sprache:

Die Kurssprache ist englisch.

--------------------------------------------------------------------------------


APPLICABLE TECHNOLOGIES

 * Acceleration and AI
 * FPGA technologies
 * XILINX Versal ACAP

--------------------------------------------------------------------------------


REQUIREMENTS

 * none


DATES

--------------------------------------------------------------------------------

21.07.2022 | Online
Booking


DURATION & FEE

--------------------------------------------------------------------------------

Duration: 1 hour

Fee: 0.00 €
PLC2 FREE LIVE WEBINAR


CONTACT

--------------------------------------------------------------------------------

Michael Schwarz
+49 (0) 7664 91313-15
E-Mail


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