jeffpiepmeier.blogspot.com Open in urlscan Pro
2a00:1450:4001:80f::2001  Public Scan

Form analysis
0 forms found in the DOM

Text Content

TECHNICALLY DISTRACTED

Some posts about my random techo projects at home - some Arduino, Atari, 3D
printing, RPi, etc ....





SUNDAY, OCTOBER 29, 2023


ATARI 400



 My very own first computer was an Atari 400 bought second hand by my Dad. My
friend Simon was moving back home to Ireland so wouldn't be able use an NTSC
machine. It came with a 410 tape drive, some cassettes (most of which I could
never get to load), and some carts. Because the 400 hooked up to a TV, Atari
engineers had to design a Faraday cage for the main board to pass FCC
electromagnetic interference (EMI) requirements. This resulted in the machine
needing a door to fit over the cartridge slot.

I recently bought a 400 off of eBay and unfortunately the shipper did not do a
good job packing. The power supply rumbled around and beat up the case. I got
half off - I figure I can fix it. The machine was missing one of the hinge
brackets and the cover got loose and the other hinge bracket came up. I was able
to recover the bracket, its screw, and the torsion spring. I ended up taking the
whole machine apart so I could fix the case and clean it up. The money I got
back from the damage claim was enough to buy a 48k RAM upgrade. So hey, I will
come of the deal OK.

To replace the missing hinge bracket, I drew one up on Fusion 360 and printed it
out. It fits quite nicely. The design is on Thingiverse. 

Replacement hinge bracket from the Atari 400 cart door.










Posted by jeffPiep at 7:35 PM
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest
Labels: 3D printing, Atari
Location: Maryland, USA


TUESDAY, SEPTEMBER 21, 2021


FUJINET OR WHERE'S JEFF?


Over a year ago I fell in league with some Atari people developing a new
peripheral device for the 8-bit line. The FujiNet is a nearly all-in-one SIO
device for the Atari 400/800/XL/XE line of personal computers. It is capable of
emulating disk drives, cassette drive, printers, and modem while providing a new
network (N:) device. It is based on the ESP32 wifi-enabled MCU. Thom is our ring
leader and Mozzwald our hardware designer. I'm grateful for being included and
for my teammates. This project is a perfect COVID survival activity. 


FujiNet is why I stopped blogging projects - all my project energy was directed
to FN development. What a huge technical distraction! I've been mainly a
supporting developer (e.g., doing initial integration of code into the
Platform.IO environment). I made most of the printer emulators, many with
original fonts based on real Atari printer output found in manuals or obtained
from the community. I collected and/or wrote printer test programs for verifying
the emulator behavior. My most recent contribution was the cassette drive
emulator; I'm still debugging writing cassette data to a CAS image. 





My collection of FujiNet hardware spanning the first ESP8266 unit to the
pre-release version 1.6.





Posted by jeffPiep at 4:39 PM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest
Labels: Arduino, Atari



SATURDAY, FEBRUARY 29, 2020


ATARI POKEY ACTUATION WITH ARDUINO


I've had floating in the back of my mind wanting to make a modern controller
adapter for the Atari 5200. The 5200 controller is an analog joystick, two
buttons, and a keypad. There are some modern controller projects that are really
cool. As far as I can tell, they use digitally-controlled resistors to actuate
the potentiometer inputs on the POKEY chip. Makes sense because that's what they
were designed for - reading resistors.

The POKEY, along with a few external components, basically measures the time
constant of an RC circuit. The system has an 1800-ohm resistor and 0.047 uF
capacitor internal and the controller or paddle has a 0.5-1 M-ohm potentiometer.
This makes for time constants ranging from <100 us to >10 ms. The operation is
described in section 4 of the POKEY datasheet. The RC circuit can be seen in
this excerpt of the 5200 schematic. The components on P0 (pin 14) are labeled.



The inputs P0-P7 are fed to Schmidt trigger inverters, which will go from
high-to-low when the capacitor voltage reaches about 2 volts. The time that
takes is determined by the resistance of the potentiometer. In otherwords, the
time it takes to charge up the capacitor is measured by the POKEY.

Another way to charge the capacitor is to send in pulses of current (charge)
over some time. I wondered if I could use the pulse width modulation (PWM)
feature on modern microcontrollers, like the Atmega 328p used in the Arduino, to
control how fast the capacitor charges. I had limited success. It turns out the
PWM resolution required is much too fine. I would have to resort to additional
timers and interrupts to fiddle with the PWM duty cycle and frequency.

Timers. Time. Hmmm. Charge up the capacitor at the right time!

Inside the POKEY is also a "dump transistor" that discharges the capacitor to
reset the circuit for the next frame and reading. This is done by hitting the
POTGO line. It can be seen in this schematic, again from the datasheet:



It's easy to charge up the capacitor - just apply some voltage for a few 10's of
microseconds. But how to know when to do it? The dump transistors will pull the
input pin to ground. If I monitor the paddle inputs and watch for it to go low,
I know when the capacitors are reset and can start counting. Then I can send the
input high at just the right time to trigger the POKEY.

This is super simple. And I made it work in a straightforward proof-of-concept.
Here's the circuit:



The diode stops output PIN 3 from pulling down input on PIN 2. I want the dump
transistor inside the POKEY to do the pulling. The proof-of-concept code is just
some level checking and delays. This code can be used to reliably create
readings from 1 to 227. Code 228 is made by just doing nothing, although to
transition between 227 and 228 could be jittery because of the code trying to
sync back up with the POTGO signal. A software PLL might be a way forward.

#include <Arduino.h>

void setup()
{
  pinMode(3, OUTPUT);
  pinMode(2, INPUT);

  // try to charge up the POT capacitor until it takes
  while (digitalRead(2) == LOW)
  {
    digitalWrite(3, HIGH);
    delayMicroseconds(64);
    digitalWrite(3, LOW);
  }

  // wait until dump transistor is activated
  while (digitalRead(2) == HIGH)
  {
  }
}

void loop()
{
  //trial and error on logic analyzer to get PADDLE(0)=1 despite a second late
pulse
  delayMicroseconds(2190); // count up until dump transisstor is released
  delayMicroseconds(6350*2); // delay 100 line groups
  delayMicroseconds(636*2+63*5); // delay 10 & 1 line groups

  // charge up POT capacitor
  digitalWrite(3, HIGH);
  delayMicroseconds(63);
  digitalWrite(3, LOW);

   // wait until dump transistor clears cap with some debounce
  while (digitalRead(2) == HIGH)
  {
  }
  while (digitalRead(2) == HIGH)
  {
  }
}





Posted by jeffPiep at 5:49 PM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest
Labels: Arduino, Atari



MONDAY, NOVEMBER 25, 2019


COMBO SIO2ARDUINO AND RVERTER WIFI MODEM FOR ATARI 8-BITS


I decided to glom Whizzosoft's SIO2Arduino and Paul Rickards' wifi modem
together into a single ESP8266. It boots a single ATR file stored in SPIFFS. I
demoed SIO2Arduino in a previous post.


Here's a video of it in action.







The code is on my GitHub.


Since doing this, I've joined the FujiNet development team to make something
cooler.



Posted by jeffPiep at 8:19 PM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest




SUNDAY, NOVEMBER 17, 2019


ATARI ON PAPILIO DUO


A few years ago I bought myself a Papilio DUO FPGA board. I was attracted to its
Adruino Mega form factor and inclusion of an AVR Atmega32U4 chip. The IDE was
based on the Arduino IDE. How cool - learn FPGAs inside what looked like the
Arduino ecosystem. It also came with different shields - I bought the compute
shield because it had joystick ports. Joystick ports. Did I say joystick ports? 

I ran through some demos and then set it aside. A year ago I started using is a
logic analyzer for my Atari cartridge interface project. Recently, I decided to
finally load up the Atari800 core I'd read about. I didn't do much research when
I bought the board in 2015. Had I understood more, I probably would have bought
a MIST, although the Papilio was about half the price I imagine. But I digress.




THIS.






Thankfully, 64KiB.com (aka foft) ported the Atari FPGA implementation to the
Papilio DUO. It loaded just fine, but it acted like the down arrow on the
keyboard was stuck. Fortunately, the Papilio and 64KiB creators had already
solved this problem.The AVR needed to be programmed for high-impedance inputs on
all GPIOs. Whew. 


[NOTE: the website for the FPGA cores has moved to http://www.64kib.com/]


Another problem I ran into is keyboard mapping. I have a US-layout PS2 keyboard,
which has a different layout of where the Atari arrow keys go compared to a
UK-layout. I could only make the Atari cursor go in 3 directions. So RTFM and I
learned about the UK-layout problem and started randomly trying CTRL-key combos.
"CTRL-\" worked for me.


I played my GRAVITEN game, which was the second I wrote for the BASIC game
competition. Fun.



Posted by jeffPiep at 1:30 PM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest




FRIDAY, JUNE 14, 2019


GOOD TIMING


In my last retrochallenge post I reported difficulty latching the address bus.
Using the logic analyzer, I saw the latch signal was coming a but too late
relative to the hold time of the address bus. I needed a way to edge trigger a
shorter pulse. I found this handy circuit which creates a positive edge
triggered pulse.



The pulse width is set by the RC time constant. I selected the resistor value to
limit the current being sourced and sunk by the NAND gate (configured as an
inverter). A value of 390 ohms limits the current to 13 mA peak, which is a 50%
derating on the 25 mA absolute max allowed value for a LS74HCT00 device. The
current spikes are short as they charge/discharge a small capacitor of a couple
hundred pF to set the pulse width to 140 ns. I picked the cap somewhat by trial
and error. The resulting timing looks like this:




The LE_D signal triggers the pulse generator, which outputs LE_A. The LE_A
signal successfully latches the address before it changes right after the
falling edge of phi2. 


Fortunately, I was able to use spare NAND and AND gates and only had to add the
two passives. Almost free! Being able to latch the address allows the Atari
handler and MCU software to be written to use a command/data protocol. The
address specifies the command and the data shows up on the bus. I wonder what is
possible with such an interface.

Posted by jeffPiep at 11:09 PM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest
Labels: Arduino, retrochallenge



FRIDAY, APRIL 5, 2019


RETROCHALLENGE 0319 - LAST POST


I had to take a week off of the Retrochallenge to take care of life. I finished
the month by making a completed circuit on a breadboard with mostly neat wires.
I ran into trouble reading the address bus. The timing is too tight, so I need
to change the latch signal for the address buffer.

The Retrochallenge is a good excuse to make some progress and to share the
useless tinkering of the hobby. Here's what I have to show for it:



Thanks for following along!

Posted by jeffPiep at 10:37 AM No comments:
Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest
Labels: retrochallenge

Older Posts Home

Subscribe to: Posts (Atom)



ABOUT ME

jeffPiep I'm a father, a husband and an engineer. View my complete profile



BLOG ARCHIVE

 * ▼  2023 (1)
   * ▼  October (1)
     * Atari 400

 * ►  2021 (1)
   * ►  September (1)

 * ►  2020 (1)
   * ►  February (1)

 * ►  2019 (11)
   * ►  November (2)
   * ►  June (1)
   * ►  April (1)
   * ►  March (6)
   * ►  February (1)

 * ►  2018 (3)
   * ►  March (1)
   * ►  January (2)

 * ►  2017 (8)
   * ►  December (1)
   * ►  August (1)
   * ►  June (1)
   * ►  May (1)
   * ►  April (2)
   * ►  March (1)
   * ►  February (1)

 * ►  2016 (15)
   * ►  December (2)
   * ►  November (1)
   * ►  October (1)
   * ►  August (2)
   * ►  July (1)
   * ►  June (3)
   * ►  May (1)
   * ►  March (2)
   * ►  February (1)
   * ►  January (1)

 * ►  2015 (5)
   * ►  December (1)
   * ►  November (2)
   * ►  October (2)




PAGES

 * Home
 * BASIC 10-Liners
 * Armada Chronology








Awesome Inc. theme. Powered by Blogger.



Diese Website verwendet Cookies von Google, um Dienste anzubieten und Zugriffe
zu analysieren. Deine IP-Adresse und dein User-Agent werden zusammen mit
Messwerten zur Leistung und Sicherheit für Google freigegeben. So können
Nutzungsstatistiken generiert, Missbrauchsfälle erkannt und behoben und die
Qualität des Dienstes gewährleistet werden.Weitere InformationenOk