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Next Gen Datacenters, Memory Innovation & CXL



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Computer History Museum, Mountain View, CA
28-29 March, 2023
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ABOUT THE EVENT

MemCon is the first memory event focused on end users and systems.

MemCon empowers engineers and architects working on memory-constrained problems
with peer insights from case studies in genomics, AIML, datacenter, HPC,
computational fluid dynamics, in-memory databases, and enterprise knowledge
graphs. If you are working on a memory-bound problem, come and unpack it with
your peers, and get your hands on tech demos at the same time.

For memory systems designers, MemCon is a market deep-dive, a launchpad for CXL
and emerging memory products, and a one-stop shop to meet enterprise data
experts.

Starting with datacenters and servers in 2023, MemCon will tackle memory-bound
use cases in modern and future computing. Working back from the end point – what
do future systems need to look like? - the conference will focus on the
intersection between systems design, memory innovation (emerging memories,
storage & CXL) and other enabling technologies, such as photonics.

 * Come and collaborate on solving memory-bound use cases. 
 * Beat systems bottlenecks with insights from systems architects and memory
   experts. 
 * Witness industry-defining emerging memory and CXL product launches. 
 * Keep your memory product development on target with market feedback.
 * Join a network of systems and AIML experts, plus end users. 

Event Themes:







REGISTER YOUR INTEREST HERE


CONFIRMED SPEAKERS

 


TOM GARVENS

VP, Hardware Engineering, Platforms
Google




TOM GARVENS

VP, Hardware Engineering, Platforms
Google

TOM GARVENS

VP, Hardware Engineering, Platforms
Google
 


ZAID KHAN

GM, Cloud AI & Advanced Systems
Microsoft

Zaid is currently GM in Cloud Hardware Infrastructure Engineering where he leads
a team focusing on advanced architecture and engineering efforts for AI. He is
passionate about building balanced teams of artists and soldiers that solve
incredibly difficult problems at scale.


Full bio


ZAID KHAN

GM, Cloud AI & Advanced Systems
Microsoft

ZAID KHAN

GM, Cloud AI & Advanced Systems
Microsoft

Zaid is currently GM in Cloud Hardware Infrastructure Engineering where he leads
a team focusing on advanced architecture and engineering efforts for AI. He is
passionate about building balanced teams of artists and soldiers that solve
incredibly difficult problems at scale.

Prior to Microsoft Zaid was head of infrastructure engineering at LinkedIn
responsible for all aspects of engineering for Datacenters, Compute, Networking,
Storage and Hardware. He also lead several software development teams spanning
from BMC, network operating systems, server and network fleet automation to SDN
efforts inside the datacenter and global backbone including edge. He introduced
the concept of disaggregation inside LinkedIn and pioneered JDM with multiple
vendors through key initiatives like OpenSwitch, Open19 essentially controlling
destiny for hardware development at LinkedIn. During his 9 year tenure at
LinkedIn his team scaled network and systems 150X, members from 50M to 675M, and
hiring someone every 7 seconds on the LinkedIn Platform.

Prior to LinkedIn Zaid was Network Architect at WebEx responsible for building
the MediaTone network and later I built a startup that built a pattern
recognition security chip using NPU/FPGA. Zaid holds several patents in
networking and SDN and is also a recognized industry leader. He previously
served as a board member of the Open19 Foundation and San Francisco chapter of
Internet Society. Currently he serves on DE-CIX and Pensando advisory boards.

 


DAN ERNST

Principal Architect
Microsoft

Dr. Daniel Ernst is currently a Principal Architect in Microsoft's Azure
Hardware Architecture team, which is responsible for long-range technology
pathfinding for future Azure Cloud systems. Within AHA, Dan leads the team
responsible for future memory systems. This team investigates future
architecture directions for Azure and serves as the primary architecture contact
point in technical relationships with compute, memory, and device partners, as
well as the primary driver of Microsoft’s memory standards activity.


Full bio


DAN ERNST

Principal Architect
Microsoft

DAN ERNST

Principal Architect
Microsoft

Dr. Daniel Ernst is currently a Principal Architect in Microsoft's Azure
Hardware Architecture team, which is responsible for long-range technology
pathfinding for future Azure Cloud systems. Within AHA, Dan leads the team
responsible for future memory systems. This team investigates future
architecture directions for Azure and serves as the primary architecture contact
point in technical relationships with compute, memory, and device partners, as
well as the primary driver of Microsoft’s memory standards activity.

Prior to joining Microsoft, Dan spent 10 years at Cray/HPE, most recently as a
Distinguished Technologist in the HPC Advanced Technology team. While at Cray,
Dan led multiple customer-visible collaborative pathfinding investigations into
future HPC architectures and was part of the team that architected the
Department of Energy’s Frontier and El Capitan Exascale systems.

Dan has served as part of multiple industry standards bodies throughout his
career, including JEDEC, the CXL and CCIX consortia, and as a founding Board of
Directors member of the Gen-Z Consortium.

Dan received his Ph.D. in Computer Science and Engineering from the University
of Michigan, where he studied high-performance, low-power, and fault-tolerant
microarchitectures. He also holds an MSE from Michigan and a BS in Computer
Engineering from Iowa State University.

Specialties: Computer architecture, memory technologies, low-power design,
high-performance computing, parallel computing, computer science education

 


DHEEVATSA MUDIGERE

Principal Research Scientist
Meta

Dheevatsa Mudigere is Principal Research Scientist at the AI System Co-design
team at Meta. His research is mostly around on HW/SW co-design, parallel
algorithms and high-performance computing. Over the past few years Dheevatsa and
his team have been focusing on large scale AI, specifically deep learning
recommendation models – designing and deploying efficient HW + SW solutions at
FB-scale.

 

Full bio


DHEEVATSA MUDIGERE

Principal Research Scientist
Meta

DHEEVATSA MUDIGERE

Principal Research Scientist
Meta

Dheevatsa Mudigere is Principal Research Scientist at the AI System Co-design
team at Meta. His research is mostly around on HW/SW co-design, parallel
algorithms and high-performance computing. Over the past few years Dheevatsa and
his team have been focusing on large scale AI, specifically deep learning
recommendation models – designing and deploying efficient HW + SW solutions at
FB-scale.

 

 


TOM SHEFFLER

Solution Architect, Next Generation Sequencing
Roche




TOM SHEFFLER

Solution Architect, Next Generation Sequencing
Roche

TOM SHEFFLER

Solution Architect, Next Generation Sequencing
Roche
 


DIMITRI KUSNEZOV

Under Secretary for Science & Technology
Department of Homeland Security

Dr. Dimitri Kusnezov [Kooz-NETS-off] was confirmed as the Under Secretary for
the Science and Technology Directorate (S&T) on September 8, 2022. As the
science advisor to the Homeland Security Secretary, Dr. Kusnezov heads the
research, development, innovation and testing and evaluation activities in
support of the Department of Homeland Security’s (DHS) operational Components
and first responders across the nation.

Full bio


DIMITRI KUSNEZOV

Under Secretary for Science & Technology
Department of Homeland Security

DIMITRI KUSNEZOV

Under Secretary for Science & Technology
Department of Homeland Security

Dr. Dimitri Kusnezov [Kooz-NETS-off] was confirmed as the Under Secretary for
the Science and Technology Directorate (S&T) on September 8, 2022. As the
science advisor to the Homeland Security Secretary, Dr. Kusnezov heads the
research, development, innovation and testing and evaluation activities in
support of the Department of Homeland Security’s (DHS) operational Components
and first responders across the nation. S&T is responsible for identifying
operational gaps, conceptualizing art-of-the-possible solutions, and delivering
operational results that improve the security and resilience of the nation. 

Prior to DHS, Dr. Kusnezov was a theoretical physicist working at the U.S.
Department of Energy (DOE) focusing on emerging technologies. He served in
numerous positions, including the Deputy Under Secretary for Artificial
Intelligence (AI) & Technology where he led efforts to drive AI innovation and
bring it into DOE missions, business and operations, including through the
creation of a new AI Office. 

Dr. Kusnezov has served in scientific and national security positions, including
Senior Advisor to the Secretary of Energy, Chief Scientist for the National
Nuclear Security Administration, Director of Advanced Simulation and Computing
and the Director of the multi-billion-dollar National Security Science,
Technology and Engineering programs. He created numerous programs, including for
Minority Serving Institutions, international partners, private sector and
philanthropic entities. He has worked across agencies to deliver major
milestones such as DOE’s 10-year grand challenge for a 100 Teraflop
supercomputer, and first of their kind and world’s fastest supercomputers. 

Prior to DOE and his pursuit of public service, Dr. Kusnezov had a long career
in academia where he published more than 100 articles and edited two books. He
joined Yale University faculty where he was a professor for more than a decade
in Theoretical Physics and served as a visiting professor at numerous
universities around the world. Before this post, Dr. Kusnezov did a brief
postdoc and was an instructor at Michigan State University, following a year of
research at the Institut fur Kernphysik, KFA-Julich, in Germany. He earned his
MS in Physics and Ph.D. in Theoretical Nuclear Physics at Princeton University
and received Bachelor of Arts degrees in Physics and in Pure Mathematics with
highest honors from UC Berkeley.

 

 


TIRTHANKAR LAHIRI

SVP, Data & In-Memory Technologies
Oracle

Tirthankar Lahiri is Vice President of the Data and In-Memory Technologies group
for Oracle Database and is responsible for the Oracle Database Engine (including
Database In-Memory, Data and Indexes, Space Management, Transactions, and the
Database File System), the Oracle TimesTen In-Memory Database, and Oracle
NoSQLDB.

Full bio


TIRTHANKAR LAHIRI

SVP, Data & In-Memory Technologies
Oracle

TIRTHANKAR LAHIRI

SVP, Data & In-Memory Technologies
Oracle

Tirthankar Lahiri is Vice President of the Data and In-Memory Technologies group
for Oracle Database and is responsible for the Oracle Database Engine (including
Database In-Memory, Data and Indexes, Space Management, Transactions, and the
Database File System), the Oracle TimesTen In-Memory Database, and Oracle
NoSQLDB. Tirthankar has 22 years of experience in the Database industry and has
worked extensively in a variety of areas including Manageability, Performance,
Scalability, High Availability, Caching, Distributed Concurrency Control,
In-Memory Data Management, NoSQL architectures, etc. He has 27 issued and has
several pending patents in these areas. Tirthankar has a B.Tech in Computer
Science from the Indian Institute of Technology (Kharagpur) and an MS in
Electrical Engineering from Stanford University.

 


DIRK VAN ESSENDELFT

HPC & AI Architect
National Energy Technology Laboratory

Dr. Van Essendelft is the principle investigator for the integration of AI/ML
with scientific simulations within in the Computational Device Engineering Team
at the National Energy Technology Laboratory.  The focus of Dr.

Full bio


DIRK VAN ESSENDELFT

HPC & AI Architect
National Energy Technology Laboratory

DIRK VAN ESSENDELFT

HPC & AI Architect
National Energy Technology Laboratory

Dr. Van Essendelft is the principle investigator for the integration of AI/ML
with scientific simulations within in the Computational Device Engineering Team
at the National Energy Technology Laboratory.  The focus of Dr. Van Essendelft’s
work is building a comprehensive hardware and software ecosystem that maximizes
speed, accuracy, and energy efficiency of AI/ML accelerated scientific
simulations.  Currently, his work centers around building Computational Fluid
Dynamics capability within the TensorFlow framework, generating AI/ML based
predictors, and ensuring the ecosystem is compatible with the fastest possible
accelerators and processors in industry.  In this way, Dr. Van Essendelft is
developing NETL’s first cognitive-in-the-loop simulation capability in which
AI/ML models can be used any point to bring acceleration and/or closures in new
ways.  Dr. Van Essendelft sits on the Technical Advisory Group for NETL’s new
Science-Based Artificial Intelligence/Machine Learning Institute (SAMI) and
holds degrees in Energy and Geo-Environmental Engineering, Chemical and
Biochemical Engineering, and Chemical Engineering from the Pennsylvania State
University, University of California, Irvine, and Calvin College respectively.

Recent publications:

 * Rocki, K., Van Essendelft, D., Sharapov, I., Schreiber, R., Morrison, M.,
   Kibardin, V., Portnoy, A., Dietiker, J. F., Syamlal, M., and James, M. (2020)
   Fast stencil-code computation on a wafer-scale processor, In Proceedings of
   the International Conference for High Performance Computing, Networking,
   Storage and Analysis, pp pp 1-14, IEEE Press, Atlanta, Georgia.

 


NATALIA VASSILLIEVA

Director of Product, Machine Learning
Cerebras

Natalia was a Sr. Research Manager at Hewlett Packard Labs, where she led the
Software and AI group and served as the head of HP Labs Russia from 2011 until
2015. Prior to HPE, she was an Associate Professor at St. Petersburg State
University in Russia and worked as a software engineer for several IT companies.
Natalia holds a Ph.D. in computer science from St. Petersburg State University.

Full bio


NATALIA VASSILLIEVA

Director of Product, Machine Learning
Cerebras

NATALIA VASSILLIEVA

Director of Product, Machine Learning
Cerebras

Natalia was a Sr. Research Manager at Hewlett Packard Labs, where she led the
Software and AI group and served as the head of HP Labs Russia from 2011 until
2015. Prior to HPE, she was an Associate Professor at St. Petersburg State
University in Russia and worked as a software engineer for several IT companies.
Natalia holds a Ph.D. in computer science from St. Petersburg State University.

 


KEITH WINKELER

VP of Engineering, PowerEdge & Core Compute Platforms
Dell Technologies

Keith Winkeler is VP of Engineering, PowerEdge & Core Compute Platforms at Dell
Technologies. Keith is an accomplished and collaborative executive with 30 years
of demonstrated excellence in building and leading high performance global
organizations responsible for architectural definition, development and delivery
of industry leading HW/SW products. His proven strengths include talent
management and development, organizational design, matrixed and global teams,
ODM partner leadership and value chain management.


Full bio


KEITH WINKELER

VP of Engineering, PowerEdge & Core Compute Platforms
Dell Technologies

KEITH WINKELER

VP of Engineering, PowerEdge & Core Compute Platforms
Dell Technologies

Keith Winkeler is VP of Engineering, PowerEdge & Core Compute Platforms at Dell
Technologies. Keith is an accomplished and collaborative executive with 30 years
of demonstrated excellence in building and leading high performance global
organizations responsible for architectural definition, development and delivery
of industry leading HW/SW products. His proven strengths include talent
management and development, organizational design, matrixed and global teams,
ODM partner leadership and value chain management.


 


MARK ORTHODOXOU

VP, Strategic Marketing, Datacenter Product
Rambus

Mark Orthodoxou is the Vice President of Strategic Marketing for Rambus’
Datacenter Products Group. Mark has over 25 years of experience in product
management and strategic planning in the semiconductor industry across multiple
technology disciplines, including enterprise storage, data center compute,
memory subsystems and networking. Mark has evangelized the benefits of
serial-attached memory since long before CXL was introduced as a standard and
was responsible for the introduction of the first commercially available
products in this space.

Full bio


MARK ORTHODOXOU

VP, Strategic Marketing, Datacenter Product
Rambus

MARK ORTHODOXOU

VP, Strategic Marketing, Datacenter Product
Rambus

Mark Orthodoxou is the Vice President of Strategic Marketing for Rambus’
Datacenter Products Group. Mark has over 25 years of experience in product
management and strategic planning in the semiconductor industry across multiple
technology disciplines, including enterprise storage, data center compute,
memory subsystems and networking. Mark has evangelized the benefits of
serial-attached memory since long before CXL was introduced as a standard and
was responsible for the introduction of the first commercially available
products in this space. Mark currently sits on the CXL Consortium Marketing
Working Group. He has held various leadership positions at Microchip, Microsemi,
PMC-Sierra, and IDT.

 


DAN MCCREARY

Distinguished Engineer, Graph & AI
Optum

Dan is a distinguished engineer in AI working on innovative database
architectures including document and graph databases. He has a strong background
in semantics, ontologies, NLP and search. He is a hands-on architect and like to
build his own pilot applications using new technologies. Dan started the NoSQL
Now! Conference (now called the Database Now! Conferences). He also co-authored
the book Making Sense of NoSQL, one of the highest rated books on Amazon on the
topic of NoSQL. Dan worked at Bell Labs as a VLSI circuit designer where he
worked with Brian Kernighan (of K&R C).

Full bio


DAN MCCREARY

Distinguished Engineer, Graph & AI
Optum

DAN MCCREARY

Distinguished Engineer, Graph & AI
Optum

Dan is a distinguished engineer in AI working on innovative database
architectures including document and graph databases. He has a strong background
in semantics, ontologies, NLP and search. He is a hands-on architect and like to
build his own pilot applications using new technologies. Dan started the NoSQL
Now! Conference (now called the Database Now! Conferences). He also co-authored
the book Making Sense of NoSQL, one of the highest rated books on Amazon on the
topic of NoSQL. Dan worked at Bell Labs as a VLSI circuit designer where he
worked with Brian Kernighan (of K&R C). Dan also worked with Steve Jobs at NeXT
Computer.

 


MATTHEW BURNS

Technical Marketing Manager
Samtec

Matthew Burns develops go-to-market strategies for Samtec’s Silicon to Silicon
solutions. Over the course of 20+ years, he has been a leader in design,
technical sales and marketing in the telecommunications, medical and electronic
components industries. Mr. Burns holds a B.S. in Electrical Engineering from
Penn State University.

Full bio


MATTHEW BURNS

Technical Marketing Manager
Samtec

MATTHEW BURNS

Technical Marketing Manager
Samtec

Matthew Burns develops go-to-market strategies for Samtec’s Silicon to Silicon
solutions. Over the course of 20+ years, he has been a leader in design,
technical sales and marketing in the telecommunications, medical and electronic
components industries. Mr. Burns holds a B.S. in Electrical Engineering from
Penn State University.

 


SUMTI JAIRATH

Chief Architect
SambaNova Systems

Sumti Jairath is Chief Architect at SambaNova Systems, with expertise in
hardware-software co-design. Sumti worked on PA-RISC-based Superdome servers
back at HP, followed by several generations of SPARC CMT processors at Sun
Microsystems and Oracle. At Oracle, Sumti worked on SQL, Data-analytics and
Machine Learning acceleration in SPARC processors. Sumti holds 27 patents in
computer architecture and hardware-software co-design.

 

Full bio


SUMTI JAIRATH

Chief Architect
SambaNova Systems

SUMTI JAIRATH

Chief Architect
SambaNova Systems

Sumti Jairath is Chief Architect at SambaNova Systems, with expertise in
hardware-software co-design. Sumti worked on PA-RISC-based Superdome servers
back at HP, followed by several generations of SPARC CMT processors at Sun
Microsystems and Oracle. At Oracle, Sumti worked on SQL, Data-analytics and
Machine Learning acceleration in SPARC processors. Sumti holds 27 patents in
computer architecture and hardware-software co-design.

 

 


ROB OBER

Chief Platform Architect
NVIDIA

Rob is NVIDIA’s data center Chief Platform Architect, working with Hyperscalers
to build GPU clusters for AI and Deep Learning, develop systems and platform
architecture, and influence the HW and SW GPU roadmaps at NVIDIA. His interest
in AI and DL was driven by its impact on computer science and computer
architecture.


Full bio


ROB OBER

Chief Platform Architect
NVIDIA

ROB OBER

Chief Platform Architect
NVIDIA

Rob is NVIDIA’s data center Chief Platform Architect, working with Hyperscalers
to build GPU clusters for AI and Deep Learning, develop systems and platform
architecture, and influence the HW and SW GPU roadmaps at NVIDIA. His interest
in AI and DL was driven by its impact on computer science and computer
architecture.

With more than 35 years experience, Rob was Senior Fellow of Enterprise
Technology at SanDisk / FusionIO, Corporate Fellow and Chief Architect at LSI;
Fellow and Architect at AMD; Chief Architect at Infineon; Manager of
Technologies at Apple Computer, as well as designer of supercomputers,
mainframes, and networks.

Rob has over 40 international patents in processor architecture, storage
systems, SSDs, networks, wireless, power management, and mobile devices. He has
developed architecture and implementation of CRAY, ARM, PowerPC, ARC, Sparc,
TriCore and x86 processors.

 


JEAN BOZMAN

President
Cloud Architects Advisors, LLC

Jean S. Bozman is an IT industry analyst focusing on cloud infrastructure and
the proud founder of a new company, Cloud Architects Advisors LLC.

She has had experience as an IDC Research VP for 10+ years and has covered the
semiconductor industry as an analyst for over 20 years.


Full bio


JEAN BOZMAN

President
Cloud Architects Advisors, LLC

JEAN BOZMAN

President
Cloud Architects Advisors, LLC

Jean S. Bozman is an IT industry analyst focusing on cloud infrastructure and
the proud founder of a new company, Cloud Architects Advisors LLC.

She has had experience as an IDC Research VP for 10+ years and has covered the
semiconductor industry as an analyst for over 20 years.


 


BILL GERVASI

Chair, Digital Logic: JEDEC & Principal Systems Architect: Nantero
JEDEC

Bill Gervasi joined Intel in 1976 in the computer systems group manufacturing
department, eventually leaving Intel in 1995. During that period, the computer
industry changed from computers that filled rooms the size of basketball courts
to desktop and laptop form factors in nearly every home in the world.


Full bio


BILL GERVASI

Chair, Digital Logic: JEDEC & Principal Systems Architect: Nantero
JEDEC

BILL GERVASI

Chair, Digital Logic: JEDEC & Principal Systems Architect: Nantero
JEDEC

Bill Gervasi joined Intel in 1976 in the computer systems group manufacturing
department, eventually leaving Intel in 1995. During that period, the computer
industry changed from computers that filled rooms the size of basketball courts
to desktop and laptop form factors in nearly every home in the world.

Since then, Bill specialized in the computer memory technology arena, getting
involved in international standards and battles for global dominance for this
key part of computer systems. As a chairman of the JEDEC standards organization,
he has had a role in paving the memory industry roadmap, and contributed to
spreading these standards to the world including engagement with foreign
governments. Bill is a public speaker in this niche, generating both excitement
and controversy with his aggressive vision for change and progress.

Bill is an incurable practical joker who thrives on making people laugh (or
periodically grimace), and his years in the nascent computer industry are polka
dotted with gags on unsuspecting co-workers. Bill’s eclectic background also
includes years as a published food critic, and fortunately even more years as an
aerobics fitness instructor, apparently to burn off the calories consumed while
reviewing restaurants. He lives with his wife in Orange County, California.

Bill makes the best coffee in the world, in case you wondered.

 


JIM HANDY

General Director
Objective Analysis




JIM HANDY

General Director
Objective Analysis

JIM HANDY

General Director
Objective Analysis
 


CAMBERLEY BATES

Managing Director & Analyst
Evaluator Group

www.evaluatorgroup.com

Camberley is responsible for corporate leadership and as an analyst, tracks
go-to-market and channel strategies. She brings over 20 years of executive
experience leading sales and marketing teams at VERITAS, GE Access, and EDS. Her
unique 360-degree view of addressing challenges and delivering solutions was
achieved from crossing the boundary of sales and channel engagement with large
enterprise vendors and her own 100-person IT services firm.

Full bio


CAMBERLEY BATES

Managing Director & Analyst
Evaluator Group

CAMBERLEY BATES

Managing Director & Analyst
Evaluator Group

www.evaluatorgroup.com

Camberley is responsible for corporate leadership and as an analyst, tracks
go-to-market and channel strategies. She brings over 20 years of executive
experience leading sales and marketing teams at VERITAS, GE Access, and EDS. Her
unique 360-degree view of addressing challenges and delivering solutions was
achieved from crossing the boundary of sales and channel engagement with large
enterprise vendors and her own 100-person IT services firm.

Before joining Evaluator Group in 2009, she provided Global 250 startups with
go-to-market strategies at her consulting firm, Bates Strategy Group. She also
created new market category “MAID” as Vice President of Marketing at COPAN and
led a worldwide marketing team including channels as a VP at VERITAS. At GE
Access, a $2B distribution company, she served as VP of a new division and
succeeded in growing the company from $14 to $500 million. Camberley began her
career at IBM in sales and management.

She holds a BS degree in International Business from California State University
– Long Beach and executive certificates from Wellesley and Wharton School of
Business.

 

 


NICK WRIGHT

Chief Architect & Head, Advanced Technology Group
NERSC

Nick Wright is the advanced technologies group lead and the NERSC chief
architect. He focuses upon evaluating future technologies for potential
application in scientific computing. He led the effort to optimize
the architecture of the Perlmutter machine, the first NERSC platform designed to
meet needs of both large scale simulation and data analysis from experimental
facilities. Before moving to NERSC, he was a member of the Performance Modeling
and Characterization (PMaC) group at the San Diego Supercomputing Center.

Full bio


NICK WRIGHT

Chief Architect & Head, Advanced Technology Group
NERSC

NICK WRIGHT

Chief Architect & Head, Advanced Technology Group
NERSC

Nick Wright is the advanced technologies group lead and the NERSC chief
architect. He focuses upon evaluating future technologies for potential
application in scientific computing. He led the effort to optimize
the architecture of the Perlmutter machine, the first NERSC platform designed to
meet needs of both large scale simulation and data analysis from experimental
facilities. Before moving to NERSC, he was a member of the Performance Modeling
and Characterization (PMaC) group at the San Diego Supercomputing Center. He
earned both his undergraduate and doctoral degrees in chemistry at the
University of Durham in England.

 


DAVE LACEY

Chief Software Architect
Graphcore




DAVE LACEY

Chief Software Architect
Graphcore

DAVE LACEY

Chief Software Architect
Graphcore
 


PEDRAM KHALILI

Associate Professor of Electrical and Computer Engineering
Northwestern University

Pedram Khalili-Amiri works on developing the computing systems of the future,
starting from novel nano-scale devices/materials that enable systems with
unprecedented performance and energy efficiency. Much of his work involves
devices that use both the spin and charge of electrons, also referred to as
spintronics.

Full bio


PEDRAM KHALILI

Associate Professor of Electrical and Computer Engineering
Northwestern University

PEDRAM KHALILI

Associate Professor of Electrical and Computer Engineering
Northwestern University

Pedram Khalili-Amiri works on developing the computing systems of the future,
starting from novel nano-scale devices/materials that enable systems with
unprecedented performance and energy efficiency. Much of his work involves
devices that use both the spin and charge of electrons, also referred to as
spintronics. Previously Pedram was an adjunct assistant professor in the
department of electrical and computer engineering at UCLA from 2013-2017, where
he co-led the memory program within the NSF TANMS center, focusing
on development of electric-field-controlled magnetic memory with unprecedented
energy efficiency. During 2009-2014, at UCLA he was project manager of two DARPA
multi-institution programs, focusing on the development of spin-transfer-torque
magnetic random access memory (STT-MRAM) and non-volatile logic (NVL), working
with several major industry and university partners. These programs resulted in
the world’s fastest and lowest-power magnetic memory technologies at the
time. In addition, since 2012 he has been co-founder of Inston Inc., a startup
company pioneering voltage-controlled MRAM for high-performance computing
applications, where he also served as board member and chief technology officer 
for five years. His professional activities have included serving as a guest
editor for Spin, and serving on the technical program committee of the Joint
MMM/Intermag Conference.

 


MAHESH WAGH

Senior Fellow & Server System Architect
AMD

Mahesh Wagh is AMD Sr. Fellow, Server System Architect in the AMD Datacenter
System Architecture and Engineering team, developing world-class products and
solutions around EPYC processors.

Prior to joining AMD, Mahesh was a Senior Principal Engineer at Intel
corporation, focusing on IO and SoC architecture and related technology
developments. He has broad experience in chipset and IO architecture, design and
validation on both Server and Client platforms.

Full bio


MAHESH WAGH

Senior Fellow & Server System Architect
AMD

MAHESH WAGH

Senior Fellow & Server System Architect
AMD

Mahesh Wagh is AMD Sr. Fellow, Server System Architect in the AMD Datacenter
System Architecture and Engineering team, developing world-class products and
solutions around EPYC processors.

Prior to joining AMD, Mahesh was a Senior Principal Engineer at Intel
corporation, focusing on IO and SoC architecture and related technology
developments. He has broad experience in chipset and IO architecture, design and
validation on both Server and Client platforms.

Some of Mahesh´s significant achievements include the enhancements to PCI
Express Architecture and Specification, leading CPU IO domain architecture and
IO IP architecture & Interfaces and leading AMD´s Compute Express Link (CXL)
efforts.


+ See More

View Agenda


COMPANIES IN ATTENDANCE INCLUDE

VIEW THE SAMPLE ATTENDEE LIST




TESTIMONIALS FROM OUR AI HARDWARE & SYSTEMS PORTFOLIO

Ahead of your visit to MemCon 2023, hear from some of our partners and attendees
on why they attended the flagship AI Hardware Summit 2022 - this will give you
an idea on what to expect in March!

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“The human connection is key to really high bandwidth discussions and building
trust and connections so it’s been a lot of fun.” 

CTO, Azure, Microsoft


“I was really excited to participate in the summit this year, mainly because it
was bringing together both the Edge Summit and AI Hardware Summit, so I saw a
number of the speakers and panellists that were brought together. It really
talked through a number of different disciplines of AI.” 

VP, Infrastructure, Meta


“The people who attend this event are exactly the people we are trying to meet.
They are smart people from up and down the ecosystem who understand deeply the
technology both of the hardware and also the end user experience.”

Integrated Comms and Brand Director, Cerebras


“It is certainly one of my favourite events of the year. I’m very happy to back
in-person, live events, so I can interact with really the worlds top talent in
AI, explore challenges in AI hardware, understand new solutions and participate
in the conversation.” 

Senior Director & Head of Autonomous Design Solutions, Synopsys


“AI HW Summit and Edge AI Summit are great events for getting connected to
industrial partners, catching up what are the latest news about AI applications
and what are the challenges and future directions that the industries are
facing! I should not forget to mention that the food and drinks are the best
ever of all the conferences I have attended.” 

Sensor Systems Engineer, Zoox Inc.


“If you are thinking about attending in the future, the main thing to ask
yourself is, how much can you afford not to know what other people are doing in
this space and how they are looking at these problems?” 

EVP, IC EDA, Siemens


“The summit brings the best crowd and the most diverse crowd of people
interested in working in AI hardware and we wanted to have a presence here to
connect with them.” 

Co-Founder & CEO, Rain Neuromorphics


“AI Hardware Summit was an extremely productive event for me. All presentations
were outstanding and rich with specific technical information and best
practices. I made many new industry connections. The organizers were very
helpful, and the facility was excellent. I am looking forward to attending
future related events.” 

Technical Director AI and Cloud, Quantum Corporation


“This is a great forum to learn about the next generation AI Hardware needs and
roadmap activities.” 

CTO, Xscape Photonics Inc.



ATTENDEES IN OUR ECOSYSTEM






PARTNERS


GOLD PARTNERS




RAMBUS

WEBSITE: HTTPS://WWW.RAMBUS.COM/

Rambus is a provider of industry-leading chips and silicon IP making data faster
and safer. With over 30 years of advanced semiconductor experience, we are a
pioneer in high-performance memory subsystems that solve the bottleneck between
memory and processing for data-intensive systems. Whether in the cloud, at the
edge or in your hand, real-time and immersive applications depend on data
throughput and integrity. Rambus products and innovations deliver the increased
bandwidth, capacity and security required to meet the world’s data needs and
drive ever-greater end-user experiences. For more information, visit rambus.com.


SAMTEC

WEBSITE: HTTP://WWW.SAMTEC.COM

Founded in 1976, Samtec is a privately held, $822 MM global manufacturer of a
broad line of electronic interconnect solutions, including High-Speed
Board-to-Board, High-Speed Cables, Mid-Board and Panel Optics, Precision RF,
Flexible Stacking, and Micro/Rugged components and cables. With 40+ location
severing approximately 125 countries, Samtec’s global presence enables its
unmatched customer service. 


SNIA

WEBSITE: HTTPS://WWW.SNIA.ORG/

The Storage Networking Industry Association (SNIA) is pleased to be an
association sponsor of MemCon.  SNIA is a not-for-profit global organization
made up of member companies spanning the storage market. As a recognized and
trusted authority for storage leadership, standards, and technology expertise
worldwide, SNIA’s mission is to lead the storage industry in developing and
promoting vendor-neutral architectures, standards, and educational services that
facilitate the efficient management, movement, and security of information.
Learn more at www.snia.org

 


EVENT PARTNERS





ASSOCIATION PARTNER




SNIA

WEBSITE: HTTPS://WWW.SNIA.ORG/

The Storage Networking Industry Association (SNIA) is pleased to be an
association sponsor of MemCon.  SNIA is a not-for-profit global organization
made up of member companies spanning the storage market. As a recognized and
trusted authority for storage leadership, standards, and technology expertise
worldwide, SNIA’s mission is to lead the storage industry in developing and
promoting vendor-neutral architectures, standards, and educational services that
facilitate the efficient management, movement, and security of information.
Learn more at www.snia.org

 


MEDIA PARTNERS




DATA CENTRE MAGAZINE

WEBSITE: HTTPS://BIT.LY/3CTBIOE

Data Centre Magazine is a digital media platform for you to showcase products,
expertise, learnings, and achievements with the world’s largest community of
data executives. Because, as Robert Noyce famously said, "Knowledge is power.
Knowledge shared is power multiplied.” Do this through digital media such as
interviews, articles, case studies and videos.


HPCWIRE

WEBSITE: HTTPS://WWW.HPCWIRE.COM/

HPCwire is the #1 news and information resource covering the fastest computers
in the world and the people who run them. With a legacy dating back to 1987, HPC
has enjoyed more than three decades of world-class editorial and topnotch
journalism, making it the portal of choice selected by science,  technology and
business professionals interested in HPC, AI and data-intensive computing. For
topics ranging from late-breaking news and emerging technologies in HPC, to new
trends, expert analysis, and exclusive features, HPCwire delivers it all and
remains the HPC community’s most reliable and trusted resource.
Visit www.hpcwire.com.


INSIDEHPC

WEBSITE: HTTPS://INSIDEHPC.COM/

Founded in 2006, insideHPC is globally recognized for its thorough and
insightful coverage across the HPC community, providing a bridge linking readers
among vendors, users and HPC strategists with a following that includes public
and private companies of all sizes, government agencies, research centers,
industry analysts and academic institutions. In short: the buyers and
influencers of HPC, HPC-AI and associated emerging technologies.

THE News Analysis Site for HPC Insiders. We’re all about HPC, but like the
emerging HPC ecosystem, insideHPC is evolving with a number of important updates
and topic focus areas coming later in 2022. To better serve our growing
readership and advertising base, insideHPC will deliver an updated format and
featured spotlight coverage of the emerging markets of enterprise HPC, HPC-AI,
exascale (and post-exascale) supercomputing, quantum computing, cloud HPC, edge
computing and High Performance Data Analytics. Our mission is to cover every
aspect of HPC.

Written and edited by seasoned HPC journalists, insideHPC represents the many
voices of the global HPC community: where HPC is today and where it’s going.


KHRONOS GROUP

WEBSITE: HTTPS://WWW.KHRONOS.ORG/

The Khronos Group is an open, non-profit, member-driven consortium of over 150
industry-leading companies creating advanced, royalty-free interoperability
standards for 3D graphics, augmented and virtual reality, parallel programming,
vision acceleration and machine learning. Khronos standards include Vulkan®,
Vulkan® SC, OpenGL®, OpenGL® ES, OpenGL® SC, WebGL™, SPIR-V™, OpenCL™, SYCL™,
OpenVX™, NNEF™, OpenXR™, 3D Commerce™, ANARI™, and glTF™. Khronos members are
enabled to contribute to the development of Khronos specifications, are
empowered to vote at various stages before public deployment and are able to
accelerate the delivery of their cutting-edge accelerated platforms and
applications through early access to specification drafts and conformance tests.


LASER FOCUS WORLD

WEBSITE: HTTPS://WWW.LASERFOCUSWORLD.COM/

Please visit our website for more information.


SEMICONDUCTOR ENGINEERING

WEBSITE: HTTPS://SEMIENGINEERING.COM/

Please visit our website for more information.


SEMIWIKI

WEBSITE: HTTPS://SEMIWIKI.COM/

The Open Forum for Semiconductor Professionals.


TANIS COMMUNICATIONS

If you're interested in joining MemCon 2023 as a member of the press, please
contact Nicole.Conley@taniscomm.com


UNITE AI

WEBSITE: HTTPS://WWW.UNITE.AI/

Please visit our website for more information.


MEMCON SPONSORSHIP BROCHURE

Download the Sponsorship Brochure to learn more about how you can partner with
the event, and the opportunities available. 

Download the Sponsorship Brochure




INTERESTED IN A PRESS PASS?

IF YOU'RE INTERESTED IN A PRESS PASS OR WOULD LIKE TO LEARN ABOUT MEDIA
PARTNERSHIP OPPORTUNITIES, PLEASE CONTACT PRIYA.KHOSLA@KISACORESEARCH.COM 


RESOURCES

MemCon Sponsorship Brochure
MemCon 2023 - Sample Attendee List


DOWNLOAD RESOURCE





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2023 INFORMATION PACK

Please complete your details to receive a copy of the 2023 MemCon Information
Pack. 

 * Get an overview of the content. For detailed information, view our agenda
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Computer History Museum, 1401 N Shoreline Blvd, Mountain View, CA 94043

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