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Submitted URL: http://www.lkml.org//lkml//2018//1//4//615
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Submission: On October 04 via api from US — Scanned from NL
Effective URL: https://lkml.org//lkml//2018//1//4//615
Submission: On October 04 via api from US — Scanned from NL
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[lkml] [2018] [Jan] [4] [last100] Views: [wrap][no wrap] [headers] [forward] Messages in this thread * First message in thread * Tim Chen * Tim Chen * Borislav Petkov * Dave Hansen * Borislav Petkov * Thomas Gleixner * Andrea Arcangeli * Dave Hansen * Borislav Petkov * Andrea Arcangeli * Tim Chen * Alan Cox * Greg KH * Tim Chen * Peter Zijlstra * Tim Chen * Andrea Arcangeli * David Woodhouse * Tim Chen * Tim Chen * Borislav Petkov * Andrea Arcangeli * Borislav Petkov * Tim Chen * Alan Cox * Greg KH * "Woodhouse, David" * "" * Andrew Cooper * Andrea Arcangeli * Yves-Alexis Perez * Tim Chen * Peter Zijlstra * Thomas Gleixner * Tim Chen * Peter Zijlstra * Andrea Arcangeli * Tim Chen * Andrea Arcangeli * Tim Chen * Greg KH * Tim Chen * Dave Hansen * Peter Zijlstra * Andrea Arcangeli * Dave Hansen * Andy Lutomirski * Thomas Gleixner * Tim Chen * Peter Zijlstra * Tim Chen * Dave Hansen * Thomas Gleixner * Tim Chen * Greg KH * Tim Chen * David Woodhouse * Tom Lendacky * Tim Chen * Thomas Gleixner * Andrea Arcangeli * Thomas Gleixner * Linus Torvalds * David Woodhouse * Linus Torvalds * David Woodhouse * Andrew Cooper * "Van De Ven, Arjan" * Paul Turner * Florian Weimer * David Woodhouse * Justin Forbes * Tim Chen * Yves-Alexis Perez * Greg KH FromTim Chen <>Subject[PATCH 0/7] IBRS patch seriesDateThu, 4 Jan 2018 09:56:41 -0800 This patch series enables the basic detection and usage of x86 indirect branch speculation feature. It enables the indirect branch restricted speculation (IBRS) on kernel entry and disables it on exit. It enumerates the indirect branch prediction barrier (IBPB). The x86 IBRS feature requires corresponding microcode support. It mitigates the variant 2 vulnerability described in https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html If IBRS is set, near returns and near indirect jumps/calls will not allow their predicted target address to be controlled by code that executed in a less privileged prediction mode before the IBRS mode was last written with a value of 1 or on another logical processor so long as all RSB entries from the previous less privileged prediction mode are overwritten. Setting of IBPB ensures that earlier code's behavior does not control later indirect branch predictions. It is used when context switching to new untrusted address space. Unlike IBRS, IBPB is a command MSR and does not retain its state. Speculation on Skylake and later requires these patches ("dynamic IBRS") be used instead of retpoline[1]. If you are very paranoid or you run on a CPU where IBRS=1 is cheaper, you may also want to run in "IBRS always" mode. See: https://docs.google.com/document/d/e/2PACX-1vSMrwkaoSUBAFc6Fjd19F18c1O9pudkfAY-7lGYGOTN8mc9ul-J6pWadcAaBJZcVA7W_3jlLKRtKRbd/pub More detailed description of IBRS is described in the first patch. It is applied on top of the page table isolation changes. A run time and boot time control of the IBRS feature is provided There are 2 ways to control IBRS 1. At boot time noibrs kernel boot parameter will disable IBRS usage Otherwise if the above parameters are not specified, the system will enable ibrs and ibpb usage if the cpu supports it. 2. At run time echo 0 > /sys/kernel/debug/ibrs_enabled will turn off IBRS echo 1 > /sys/kernel/debug/ibrs_enabled will turn on IBRS in kernel echo 2 > /sys/kernel/debug/ibrs_enabled will turn on IBRS in both userspace and kernel (IBRS always) [1] https://lkml.org/lkml/2018/1/4/174 Tim Chen (7): x86/feature: Detect the x86 feature to control Speculation x86/enter: MACROS to set/clear IBRS x86/enter: Use IBRS on syscall and interrupts x86/idle: Disable IBRS entering idle and enable it on wakeup x86: Use IBRS for firmware update path x86/spec_ctrl: Add sysctl knobs to enable/disable SPEC_CTRL feature x86/microcode: Recheck IBRS features on microcode reload Documentation/admin-guide/kernel-parameters.txt | 4 + arch/x86/entry/entry_64.S | 24 +++ arch/x86/entry/entry_64_compat.S | 9 + arch/x86/include/asm/apm.h | 6 + arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/efi.h | 16 +- arch/x86/include/asm/msr-index.h | 7 + arch/x86/include/asm/mwait.h | 19 ++ arch/x86/include/asm/spec_ctrl.h | 253 ++++++++++++++++++++++++ arch/x86/kernel/cpu/Makefile | 1 + arch/x86/kernel/cpu/microcode/core.c | 6 + arch/x86/kernel/cpu/scattered.c | 11 ++ arch/x86/kernel/cpu/spec_ctrl.c | 124 ++++++++++++ arch/x86/kernel/process.c | 9 +- 14 files changed, 486 insertions(+), 4 deletions(-) create mode 100644 arch/x86/include/asm/spec_ctrl.h create mode 100644 arch/x86/kernel/cpu/spec_ctrl.c -- 2.9.4 Last update: 2018-01-04 19:18 [from the cache] ©2003-2020 Jasper Spaans|hosted at Digital Ocean and my Meterkast|Read the blog