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Effective URL: https://www.avnet.com/wps/portal/us/resources/article/how-designing-for-5g-brings-many-interconnect-challenges/?utm_ca...
Submission: On December 03 via api from US — Scanned from DE
Effective URL: https://www.avnet.com/wps/portal/us/resources/article/how-designing-for-5g-brings-many-interconnect-challenges/?utm_ca...
Submission: On December 03 via api from US — Scanned from DE
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Text Content
Avnet is celebrating its 100th anniversary! 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Diversity * Careers * Certifications Overview Quality Certifications * Social Responsibility (ESG) Overview Awards & Recognition Community Engagement Environmental Sustainability REACH | RoHS Ethics and Compliance Code of Conduct Commitment Human Rights Policies Reports * Avnet Executive Leadership Team * Avnet Board of Directors * Investor Relations * Newsroom * Avnet Companies Avnet Abacus Avnet Silica Farnell Farnell (Europe) Newark (Americas) element14 (Asia) Eluomeng (China) element14 Community Avnet Integrated EBV Elektronik Avid Technologies Hackster.io * BOM Manager * MY AVNET Sign In To Unlock All Features SIGN IN / REGISTER * Dashboard * PROFILE * Activity Center * BOMS * ORDERS * REPORTS * QUOTES * BOOKMARKS * PO Upload (Beta) * Quick Buy {} ARTICLE THE 5G INTERCONNECT DESIGN CHALLENGES AND THEIR SOLUTIONS 14. Oktober 2021 AddThis Sharing Buttons Share to FacebookFacebookShare to TwitterTwitterShare to LinkedInLinkedIn Connectivity & communications Interconnect Passives & Electromechanical 5G SEE ALL AVNET ARTICLES Momentum around 5G continues to build, bringing challenges and opportunities in equal measure. Avnet spoke with Molex Global Product Manager Mike Hansen to find out more about the role copper interconnect plays in the development of the next high-speed cellular network. In the world of interconnect, there’s RF, there’s optical and there’s copper. With our thirst for more data there would seem to be a general trend towards moving as much of the data traffic into the optical domain, due in large part to the benefits it brings, like EMI resistance and high speeds. However, as anyone involved at any level with the manufacturing industry knows, cost plays a large part in the design decision. Of the three modals mentioned above, only one can deliver both power and data and for that reason it will always be necessary. But are we seeing the end of copper interconnect for data? THE COST OF 5G PERFORMANCE Mike Hansen provides the cellular context to this question. “The old way was the passive antenna, with coax cables running down to a large baseband unit, where it would be demodulated and converted to fiber for the long backhaul. With 4G, operators started putting the remote radio heads up onto the pole, right below the antennas. That’s when fiber down to the baseband unit started becoming popular. With 5G there are a few major shifts. There are a lot more antennas with massive MIMO, there are new frequency bands and it’s all a lot faster. So in addition to bringing the remote radio head up into the antenna and it becoming an active antenna unit, there’s just a lot going on in a relatively small box.” These massive arrays of antennas now need to be demodulated, converted from analog to digital and then switched or routed until it gets to the fiber. “Of course, the fiber is great for that long distance down the pole to the baseband unit, but we’re still seeing quotes coming in for board-to-board and high-speed mezzanine connectors because there are so many boards being packed into the active antenna unit (AAU),” Hansen explained. All the traditional copper-versus-fiber arguments still apply, but according to Hansen, it’s becoming more of a hybrid solution. “Inside the box, we’re seeing copper, and fiber outside the box over long distances. It’s a trade-off between speed, density and cost,” he said. In terms of density, copper still wins. Technologies like Molex’s NearStack can support 16 differential pairs in one connector in a very small footprint. The trend for higher speed is now to route over twinax rather than use PCB traces because it avoids a lot of signal loss. Some of the companies designing and using high-speed switching chips, SERDES and ASICs don’t want to route through a board and introduce a lot of loss. Using twinax is a good solution to that. “We might see a NearStack connector being right next to the chip on the board and going right out to a QSFP [quad small form factor] connector, so you have very little loss in the board because the traces are so short,” Hansen said. While PCB manufacturers are constantly improving their own technologies, flame retardant 4 (FR4) remains the dominant material. Although options including Mooring Equipment Guidelines 4 (MEG4), MEG6 and MEG7 are aimed at high-speed signalling, they are less common and more expensive. Using twinax to bypass the PCB is becoming popular as it effectively creates an overpass for data that can travel in a relatively straight line from point to point, instead of being routed using orthogonal PCB traces and perhaps moving between multiple layers through vias. > "Our job is to move high-speed signals from one place to another, so > understanding how these systems are architected helps us build solutions that > do that." — Molex Global Product Manager Mike Hansen THE HIGH-SPEED INTERFACE Moving from non-return to zero (NRZ) to Pulse Amplitude Modulation 4-level (PAM-4) and 56 Gbps to 112 Gbps is also an important design consideration. The move to 5G will soon rely more on routing these high-speed signals. “We’re certainly designing with that in mind. Even if manufacturers don’t go full 56 or 112 Gbps PAM-4 today, at least we will have the connectors ready for it,” Hansen said. Hansen sees this as another advantage of connectorizing a system, as it provides inherent modularity. “You can swap in cards or better silicon a few years later quite easily when you connectorize. Let me put it this way: Any new connector we develop for NearStack will be 112 Gbps, PAM-4 capable.” There is no single trick to designing a connector with this level of performance. Hansen explained that Molex looks at the entire channel. This includes how it is inserted into the PCB, the geometry of the connector’s beams, how the dielectric is placed between the beams, the spacing and the mating interface. “We look at it from end to end,” he said. “It helps that we’ve been doing this for 30 years. As speeds have gone up, we’ve evolved our geometries to meet the demand for speed while maintaining the density requirements.” CABLE ASSEMBLY INNOVATIONS There has also been innovation to cable assembly solutions. “We have created a unique direct-to-contact weld termination in which the wires are directly welded to the signal contact. This makes it highly repeatable, which is great for SI. The other thing we do is use high-performance twinax.” Molex also owns a twinax manufacturer, so is in a good position to avoid supply chain issues associated with sourcing materials. The connectors are modelled before going to production, with testing and adjustments made throughout the process to optimize for SI. According to Hansen, this has become a core design tenet for Molex. The company also does a lot of simulation on the front end, making it easier for an SI engineer to take a cable assembly model, put it into their own system model and see how it performs. This means the entire high-speed channel can be simulated. According to Hansen, the experience for customers has been that the real-world results match up with the simulation. Molex provides all its models and S-parameters for its connectors to customers to enable this level of design simulation. Providing models is rapidly becoming the cost of entry when supplying manufacturers using high-speed signals. That extends to models for the cable assemblies at all lengths. One of the unique connector solutions that Molex now offers is the NearStack On-the-Substrate option. As the name suggests, this puts the connector directly on the chip’s substrate. This may sound really cool (because it is) but it also has a lot of unique design challenges. For that reason, it takes a lot of close collaboration with the customer and it is really aimed at customers developing their own chips and chassis so they can implement that level of direct connection. The performance of the On-the-Substrate connector is, understandably, really good. However, and also understandably, many customers are just not in a position to mount the connector directly on the substrate. The solution to that, sampling soon, is the NearStack HD. This offers the same performance but mounts on the PCB rather than the substrate. “We’re calling it ‘near-chip placement’ rather than ‘on-chip placement,’ ”Hansen said. It means you can now put the high-speed connector on the PCB, making it easier to use. It will also help fill in the NearStack portfolio. Click here to find out more about the NearStack product family and the entire Molex portfolio available from Avnet. Dive deeper into 5G avnet content library/articles/how-designing-for-5g-brings-many-interconnect-challenges how-designing-for-5g-brings-many-interconnect-challenges MARKETING CONTENT SPOTS Dive deeper into 5G From the interconnect design challenges of 5G to preparing now for 6G, what will it take to build the networks of the future to enable your vision? Explore the key characteristics of almost limitless connectivity in any context. Learn More avnet content library/articles/how-designing-for-5g-brings-many-interconnect-challenges how-designing-for-5g-brings-many-interconnect-challenges RELATED ARTICLES Related Articles Remote testing gives RF engineers a short-cut to mmWave application development 17. November 2021 For RF engineers working on mmWave applications, limited access to hardware and test equipment can mean delays, cost and complexity. Remote testing over a secure internet connection lets engineers jump directly to application development. Read More Cellular may be the solution to common Industrial IoT networking woes 15. November 2021 A recent survey found 99 percent of respondents identified networking challenges as their customers’ primary roadblock to Industrial IoT implementation. Can cellular networks replace conventional networks for IIoT applications? Read More avnet content library/articles/how-designing-for-5g-brings-many-interconnect-challenges how-designing-for-5g-brings-many-interconnect-challenges RELATED EVENTS Related Events Automated Remote Testing of 5G mmWave RF Systems with Xilinx RFSoC Date: Location: Webinar avnet content library/articles/how-designing-for-5g-brings-many-interconnect-challenges how-designing-for-5g-brings-many-interconnect-challenges When browsing and using our website, Avnet collects, stores and/or processes personal data. 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